|
当前位置：下载中心首页 >> FPGA-CPLD应用 >> LPC2917/LPC2919 pdf,datasheet
LPC2917/LPC2919 pdf,datasheet
• An ARM968E-S processor with real-time emulation support • An AMBA multi-layer Advanced High-performance Bus (AHB) for interfacing to the on-chip memory controllers • Two DTL buses (a universal NXP interface) for interfacing to the interrupt controller and the Power, Clock and Reset Control cluster (also called subsystem) • Three VLSI Peripheral Buses (VPB - a compatible superset of ARM's AMBA advanced peripheral bus) for connection to on-chip peripherals clustered in subsystems. The LPC2915/17/19 configures the ARM968E-S processor in little-endian byte order. All peripherals run at their own clock frequency to optimize the total system power consumption. The AHB2VPB bridge used in the subsystems contains a write-ahead buffer one transaction deep. This implies that when the ARM968E-S issues a buffered write action to a register located on the VPB side of the bridge, it continues even though the actual write may not yet have taken place. Completion of a second write to the same subsystem will not be executed until the first write is finished. |
最新下载推荐下载热点下载 |
